certain conditions, such as a computer master clear or a
read/write memory reference.
Control Circuits
The I/O control circuits are under the direct or
indirect control of the program. The I/O control circuits
decode I/O commands from the CPU and generate the
required signals to execute the instructions. The timing
circuits coordinate control circuit operations.
Computers with an IOC operate independently from the
CPU after they receive an initiate I/O instruction and
control all I/O operations. Depending on the computer
type, some of the more common uses of the control
circuits include the following:
Logic to decode I/O commands
Logic to generate signals to execute I/O
instructions
Logic to evaluate priorities of I/O requests
Logic to execute buffered and unbuffered
requests
A term used quite often with I/O control operations
is the term buffer. A buffer is nothing more than a
sequential set of memory locations that contains data to
be sent out or an area that is set aside for data to be
received. A buffer is considered to be terminated when
all the words or bytes in the assigned memory locations
have been sent or received. Unbuffered operations are
where data is exchanged within the computer between
the CPU and various parts of the computer. Unbuffered
operations do not establish limits when transferring
information. Buffered operations, on the other hand,
are for the expressed purpose of transferring
information to and from the computer and an external
device; they have established buffered limits. For
example, addresses 008 through 178 in memory maybe
set aside to receive data into the computer. A buffer can
also be called a frame.
Sequencing
The I/O processor executes I/O commands using
sequencing circuits in a manner similar to the CPU.
Like the CPU, the I/O processors sequencing circuits
control the order in which events will be executed based
upon the translated function code and modifying
designators. To complete a particular I/O command,
CPU instruction, or maintenance console/equivalent
action (if available) may require the I/O processor to run
one or more of the available sequences. A processor
may have up to six sequences depending on the design
of the computer.
I/O Interface Circuits
The CPU interfaces with the I/O processor through
the CPUs I/O instructions. These instructions cause
the initiation of I/O operations. For computers with an
IOC, the instructions allow the CPU to access the RTC
or the monitor clock. This communication is done via
the bus system.
The communications lines include
some of the following:
Request lines (initiate I/O instruction)
I/O(C) select lines
Data lines
Data ready
Interrupt requests
I/O Memory Reference
The I/O processor references main memory during
specific sequences such as an instruction or a
maintenance console/equivalent action (if available).
The bus allows this to be performed asynchronously.
The I/O processor acquires I/O commands, output data,
and operands from main memory and presents the
information for storage into a main memory location
over a bus. Some of the lines of communication include
the following:
l I/O memory selection
c I/O read reference
. I/O write reference
I/O Control Memory
I/O processors can also use an I/O control memory,
which is used primarily by mainframe and
minicomputers containing an IOC. I/O control memory
words are set aside in main memory to control data
transfers for I/O buffer functions. I/O control memory
is capable of handling parallel or serial information.
PARALLEL OPERATIONS. In parallel
operations, each I/O channel has its own block of
memory addresses (usually 16). They include blocks
for input, output, external function, and external
interrupt operations.
Some of the items included in
parallel operations are as follows:
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