6-25.
6-26.
6-27.
6-28.
6-29.
A memory unit that can receive requests
from more than one CPU or I/O section is
known as which of the following types of
memories?
1. Memory pcb
2. Single-inline memory module
3. Multiported memory module
4. Dual-action memory module
Pcb type memories are usually composed
of which of the following memory types?
1. Semiconductor
2. Core
3. Film
4. Both 2 and 3 above
In a typical square form memory, the
intersection of an x row and y column is
called a
1. memory word address
2. memory word
3. memory module
4. memory cell
The x rows and y columns of a typical
memory will be equal in number.
1 . T r ue
2. False
Memory operations in most computers
usually include which of the following
items?
1. Control circuits
2. Timing circuits
3. Memory cycle
4. All of the above
6-30.
Memory interface circuits include which of
the following items?
1. Address register
2. Communication lines
3. Interfacing register
4. Both 2 and 3 above
6-31.
A word is read from memory, then rerouted
back through the Z register to be rewritten.
This is what type of memory?
1. Non-destructive readout
2. Destructive readout
3. Hardwired
4. ROM
6-32.
Priority of memory requests are evaluated
by which of the following devices?
1. Control circuits
2. Address register
3. Z register
4. CPU
6-33.
Memory read/write enables are provided by
which of the following devices?
1. Control circuits
2. Timing circuits
3. CPU
4. I/O control
6-34.
During a complete memory cycle, the first
thing that must occur is which of the
following?
1.
2.
3.
4.
Registers used for read/write
operations are cleared
Enables are generated to gate memory
address into registers used for
read/write operations
Memory address translation is
accomplished
Interface logic acknowledges reading
data from memory
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