instruction operand addressing, 5-10
interrupts, 5-10
Static RAM (SRAM), 6-22
Status-indicating registers, 5-7
Step mode, 8-15
Stop mode, 8-15
Storage
battery protected, 8-17
registers, 4-17
Store
control memory, 7-14
data, 1-2
Strobe, data, 7-32
Subassemblies, 2-13
Support systems, tactical, 1-8
Suppress
sync monitor, 7-14
word, 7-14
Surge protectors, 4-29
Switchboards, 13-1
analog, 13-35
digital, 13-25
Switches, 3-2
DIP, 8-16
key, 3-3
position, 3-3
pushbutton, 3-3
toggle, 3-4
two position, 3-4
Switching regulators, 4-20
Sync/suppress monitor, 7-14
Synchro signals, 13-6
Synchro-to-digital (S/D) conversion, 13-7
octant conversion, 13-7
sector conversion, 13-7
single-speed/dual-speed synchro conversions,
13-7
Synchros, 13-5
control synchro systems, 13-5
multispeed synchro systems, 13-5
torque systems, 13-5
Synchronous data exchanges, 7-28
Systems
ASW, 1-8
basic input/output, 5-18
cooling, 2-26
interconnection, 5-25
interface circuits, 4-21
nontactical, 1-8
number, 4-2
operating, 8-4
operational requirements, 1-14
personal/desktop, 1-9
single-phase clock, 4-23
SNAP, 1-9
tactical, 1-7
tactical support, 1-8
T
Tactical support systems, 1-7
Tactical systems, 1-7
Tape, magnetic— see magnetic tape
Task state, 5-10
instruction operand addressing, 5-10
instructions, 5-10
interrupts, 5-10
Teletypes, 3-12
Testing, diagnostic, 5-18
3.5-inch floppy disk construction, 10-8
densities and coercivities, 10-10
Time
access, 6-2
multiplexed bus, 5-26
totalizing meter, 3-2
Timers, 4-21
programmable interval, 5-5
Timing, 5-2
ALU, 5-19
circuits, 4-22, 4-23
components, 4-23
control section, 5-3
I/O, 7-12
main, 5-3
memory, 6-5
Toggle switches, 3-4
Token ring (IEEE 802.5), 7-24
Tracks, disk, 10-3
Transformer, 4-26
Translate instructions, 5-9
Translators, 4-14
Transmit buffer/transmit control, 7-21
Transmitters, universal receiver, 7-19
Twisted component/multiconductor cables, 2-25
Two-cable sequence of events, 7-33
Two-position switches, 3-4
INDEX-13
