Memory
address translation, 6-6
architecture, 6-4
cache, 5-15
capacity, 6-1
control, 5-15
core, 6-9
cycle, 6-6
direct interface, 5-26
DRAM, 6-24
drivers, 4-21
fault detection, 6-7
film, 6-13
functions, 4-15
interface circuits, 6-4
load/write control, 7-14
mapped I/O, 7-l 4
modules, 6-2
non-destructive readout, 6-27
nonvolatile, 6-2
operations, 6-1, 6-4
organization, 6-2
pcb’s, 6-3
programmable ROM, 6-30
protection, 6-8
RAM chip, 6-3,6-20
read-only (ROM), 5-17, 6-26
read/write, 6-11
ROM, 5-17,6-26
semiconductor, 6-20
SRAM, 6-22
stack, 6-11, 6-18
store control, 7-15
terminology, 6-2
types, 6-8
volatile, 6-2
Memory-type functions, 4-15
Message framed data, 7-28
Metal-oxide-semiconductor ICs, 4-7
Meter, time totalizing, 3-2
Microcomputers, 1-6, 8-10
bootstrap, 8-19
configuration, 8-16
controls, 8-17
data entry/display, 8-17
diagnostics, 8-18, 8-19
initiate operational programs, 8-19
instruction formats, 8-7
interrupt, 5-11
power, 8-17
revise/patch software, 8-20
MIL-STD-188,7-24
MIL-STD-1397, 4-22, 7-22
Minicomputers, 1-5, 8-20
bootstrap, 8-22
configuration, 8-20
controls, 8-21
data entry and display, 8-21
diagnostics, 8-21
initiate operational programs, 8-22
interrupt/lockout, 5-12
power, apply, 8-20
revise/patch software, 8-23
Modem control, 7-20
Modes
dual-channel operating, 7-11
intercomputer channel operating, 7-11
online/offline, 1-12
phase, 8-15
run, 8-15
sequence, 8-15
single channel, 7-11
step, 8-15
stop, 8-15
Modular
frames/cabinets, 2-7
layout, 2-4
Modules, memory, 6-2
Monitor
clock, 5-5
sync/suppress, 7-14
words, 7-14
Motherboard/backplane, 2-11
layout, 2-6
Multiple-phase clock systems, 4-23
Multiple-word instructions, 8-13
Multiplexing data converters, 13-14
Multivibrators, 4-23
N
NDRO memory, 6-27
Nibble, 4-24
NIPS, 1-8
Non-destructive readout memory, 5-17, 6-2, 6-27
INDEX-9
