direct memory access (DMA) gives the computer an
advantage-speed. It allows information to be moved
quickly in and out of memory without the intervention
of the CPU. DMA is given control and takes over from
the CPU as director of electronic traffic on the
computers network of communication buses. It allows
blocks of information to be transferred directly in and
out of memory and from and to an external device
without any CPU intervention.
transferred at a speed compatible with the speed of the
external device. Therefore, the use of DMA would be
advantageous when using a high-speed external device,
such as a magnetic disk. The DMA acts the same as an
I/O processor; it is just another method to control the
flow of information.
A DMA controller is usually placed between the
external device and the computers bus. The controller
uses circuits consistent with the computers other major
functional areas. The controller consists of several
functional parts. Two counter registers are used. One
generates the next main memory addresses from which
information is read or in which it is stored. This counter
register is incremented by successive information
The second counter keeps track of the
number of information words that are remaining to be
transferred. A data register serves as a buffer between
main memory and the external device. And of course,
the control circuits, will control DMA operations.
Other registers are provided for more complex external
In its most usual form, a DMA assumes command
of the computers bus when the DMA controller
receives an interrupt signal from an external device. It
then gives the CPU a hold/suspend operations message.
The CPU will respond with a hold-acknowledge signal.
It turns over control of the bus and then, in effect, takes
a short break. Meanwhile, the DMA controller moves
information between main memory and the I/O external
devices and independently carries out the I/O transfers.
The DMA controller will inform the CPU when it is
finished with an interrupt. During DMA operations, the
CPU performs other tasks. If the CPU and the DMA
controller try to access main memory simultaneously,
the DMA has priority.
Input/output (I/O) interfacing is affected by many
factors. Among them are the method of connection,
serial or parallel interfacing, and the type of equipment
the computer is interfacing with. Input/output
operations allow the computer to communicate with an
assortment of external devices. Most computers use an
I/O processor of some sort, so we concentrate our
discussion in that area. The external devices are
connected to the I/O processor via I/O channels or
ports. An I/O channel or port is nothing more than the
wiring necessary to interconnect the computers I/O
processor with one or more external devices. The type
of interfacing used will dictate the wiring of each
channel or port. Computers may have a small number
of channels or ports with multiple equipments
connected to each channel, or they may, particularly in
larger computers, have a number of I/O channels with
limited numbers or types of external equipments on
each channel or port.
METHODS OF CONNECTIONS
There is a great deal of variety not only in the types
of external devices but also in the methods of
connecting them to a computer.
One thing that
computer external devices have in common is that they
communicate wit-h the computer indiscrete binary data.
The function of the external equipment may be to
convert that data to other forms, but when a data
exchange is done over I/O channels, the data exchange
is in some form of binary data. We now look at two
methods of connecting the external equipments where
more than one external device is involved: daisy
chaining and independent request control.
When more than one peripheral device is connected
to a single port/channel, a technique called daisy
chaining is used. When daisy chained, the peripheral
devices receive or transmit information over a common
path. A separate set of addressing or control lines is
used to identify (address) specific devices and to
control the transmission or reception of information.
When the CPU dictates the use of the computers bus,
there is no difficulty in deciding which external device
will have access to the computers bus.
But in more complex situations, such as DMA
transfers, simultaneous requests for the computers bus
may be made by two or more external devices. Then a